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Edge Triggered Flip-Flops Tutorial

We looked at the  clocked D type flip-flop previously.

Q follows D while the clock is high.

If the data at D changes during the clock pulse, then Q will change.

This may be undesirable.

With the edge triggered flip-flop, Q will only follow D during the instant of the clock edge.

Either clock pulse edge may be used, positive going (rising) or negative going (falling). The symbol above is for a rising edge clock.

The timing diagram shows the rising edges of the clock pulses.

At edge A, data is low, and even though there is a positive pulse during the clock period, Q stays low.

At edge B, data is high and Q goes goes high.

At edge C, data is still high and Q stays high.

At edge D, data is still high and Q stays high.

During clock pulse D, data goes low for a period, but Q stays high.

At edge E, data has gone low and Q goes low.

Data goes high for a period during clock pulse E, but Q stays low.

At edge F, data is still low and Q stays low.

Below is a negative edge clocked flip-flop.

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