wait state
<architecture> A delay of one or more clock cycles added to a processor's
instruction execution time to allow it to communicate with slow external
devices. The number and duration of wait states may be pre-configured or they
may be controlled dynamically via certain control lines.
(1996-10-16)
Nearby terms:
WAFL « WAIS « WAITS « wait state » waldo »
walk » walking drives
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