horizontal encoding
<processor> An instruction set where each field (a bit or group of bits)
in an instruction word controls some functional unit or gate directly, as
opposed to vertical encoding where instruction fields are decoded (by hard-wired
logic or microcode) to produce the control signals. Horizontal encoding allows
all possible combinations of control signals (and therefore operations) to be
expressed as instructions whereas vertical encoding uses a shorter instruction
word but can only encode those combinations of operations built into the
decoding logic.
An instruction set may use a mixture of horizontal and vertical encoding within
each instruction. Because an architecture using horizontal encoding typically
requires more instruction word bits it is sometimes known as a very long
instruction word (VLIW) architecture.
(1995-04-23)
Nearby terms:
Hopfield model « Hopfield network « horizontal
application «
horizontal encoding » horizontal loop
combination » horizontal microcode » horizontal scan
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